Browse Prior Art Database

Page Fault Handling in Staging Type of Mass Storage Systems

IP.com Disclosure Number: IPCOM000089223D
Original Publication Date: 1977-Oct-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Platte, BG: AUTHOR [+2]

Abstract

A mass storage system (MSS) services a plurality of CPU hosts via a plurality of independent input/output (IO) channels. Control is exercised over MSS via a control link to the mass storage control (MSC). MSC in turn exercises supervisory and operational control over the two components of MSS consisting of the data base storage MSF and the staging storage facility (SSF). SSF consists of a plurality of independent staging adaptors (INSAs) which are connected through a matrix or array to a plurality of independent DASD spindles. Staging and destaging operations occur independently between MSF and SSF under control of MSC. Addressing from the CPU host to SSF is in the virtual address space involving virtual volumes mountable on logical units called VUAs. Each logical mount can occur on a plurality of actual DASD spindles.

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Page Fault Handling in Staging Type of Mass Storage Systems

A mass storage system (MSS) services a plurality of CPU hosts via a plurality of independent input/output (IO) channels. Control is exercised over MSS via a control link to the mass storage control (MSC). MSC in turn exercises supervisory and operational control over the two components of MSS consisting of the data base storage MSF and the staging storage facility (SSF). SSF consists of a plurality of independent staging adaptors (INSAs) which are connected through a matrix or array to a plurality of independent DASD spindles. Staging and destaging operations occur independently between MSF and SSF under control of MSC. Addressing from the CPU host to SSF is in the virtual address space involving virtual volumes mountable on logical units called VUAs. Each logical mount can occur on a plurality of actual DASD spindles.

Whenever a CPU host requests access to data supposedly in SSF and it actually has not yet been staged to SSF, a page fault occurs. A page fault results in a signal from INSA to MSC requesting that the required data be staged from MSF to SSF. In the mean time, INSA supplies a channel retry signal to the host, causing it to wait for the staging operation. It can be readily envisioned that with a plurality of CPU hosts the queueing of staging operations based upon staging faults can become quite long resulting in indeterminable delays in data processing operations, particularly highly interac...