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Reducing Stress in Silicon Dioxide Silicon Nitride Composite Insulative Layers Over Integrated Circuits

IP.com Disclosure Number: IPCOM000089246D
Original Publication Date: 1977-Oct-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Bohg, A: AUTHOR [+2]

Abstract

It has been recognized in the art that silicon nitride insulative layers directly on silicon substrates will create undesirable stress between the insulative layer and the substrate. Accordingly, the area of silicon nitride in direct contact with the substrate should be minimized. Reference is made to U. S. Patent 4,002,511 in this connection.

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Reducing Stress in Silicon Dioxide Silicon Nitride Composite Insulative Layers Over Integrated Circuits

It has been recognized in the art that silicon nitride insulative layers directly on silicon substrates will create undesirable stress between the insulative layer and the substrate. Accordingly, the area of silicon nitride in direct contact with the substrate should be minimized. Reference is made to U. S. Patent 4,002,511 in this connection.

In order to minimize such stress, it has become standard practice in the art that, when utilizing a silicon nitride insulative layer on a silicon substrate, an intermediate layer of silicon dioxide between the silicon nitride layer and the silicon substrate should be used. Such structures are basic in the integrated circuit technology utilizing lateral recessed silicon dioxide dielectric isolation, as described in the referenced patent.

We have now found that some stress tends to occur even in structures having an intermediate layer of silicon dioxide between the silicon nitride in the substrate. We also have a simplified expedient for relieving such stress, particularly in structures having recessed silicon dioxide dielectric isolation. This expedient will be described with respect to the figure. In the structure shown, P base region 10 is formed in the silicon substrate in any conventional manner. Also, N emitter region 12 is conventionally formed in this substrate. Recessed silicon dioxide region 13 provides the latera...