Browse Prior Art Database

Bipolar Transistor Fabrication Process

IP.com Disclosure Number: IPCOM000089250D
Original Publication Date: 1977-Oct-01
Included in the Prior Art Database: 2005-Mar-04
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Lee, CH: AUTHOR

Abstract

This process provides better control of beta and intrinsic base resistance of a transistor.

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Bipolar Transistor Fabrication Process

This process provides better control of beta and intrinsic base resistance of a transistor.

In Fig. 1 subcollector region 4 and P+ isolation region 12 are formed in substrate 2 by a standard process. The surface masks are then stripped, an epitaxial layer 16 is grown and oxidized, and a layer of silicon nitride 18 is deposited atop oxide 17.

Openings are then made for the formation of dielectric isolation regions, which are shown in Fig. 2 by numerals 20 and 21. Photoresist layer 22 is applied, and an N+ ion-implanted reach-through region 24 is formed. Photoresist layer 22 is then stripped and photoresist layer 23 is applied so as to mask all surfaces of the semiconductor except the base region. Base region 25 is then formed by ion implantation, and photoresist 23 is then stripped away.

An "all contacts" photoresist layer 28 is then applied (Fig. 3), which is followed by the plasma etching of the oxide and nitride layers 17 and 18, respectively. Resist 28 is stripped, and N contact mask 30 is applied. Emitter 31 is formed, and a second doping of collector reach-through region 24 is accomplished at the same time.

The process is essentially completed except for the formation of the P contact region defined by mask 34 in Fig. 4.

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