Browse Prior Art Database

Dynamic Addition Deletion of a Parallel CPU

IP.com Disclosure Number: IPCOM000089479D
Original Publication Date: 1977-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 24K

Publishing Venue

IBM

Related People

Davidson, GA: AUTHOR [+2]

Abstract

The addition of an auxiliary CPU (central processing unit) dynamically to an active single processor environment is achieved by utilization of a multiprocessing feature in conjunction with a mechanism by which integrated multiprocessing supervisory functions are activated. Attached auxiliary processors may be deactivated via the same mechanism.

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Dynamic Addition Deletion of a Parallel CPU

The addition of an auxiliary CPU (central processing unit) dynamically to an active single processor environment is achieved by utilization of a multiprocessing feature in conjunction with a mechanism by which integrated multiprocessing supervisory functions are activated. Attached auxiliary processors may be deactivated via the same mechanism.

Consider a typical single processor operating system as shown in the figure. Such systems may be characterized as consisting of supervisory and scheduling functions by which the base hardware resources of the host system are controlled for use by end-user application programs. Implementation of these management functions creates the system interface viewed by applications in a particular operating system environment. With the exceptions of basic I/O and timing facilities, services afforded by this system interface are synchronous in nature due to the serial design of system hardware (single CPU).

Existing dual processor operating systems take advantage of the additional CPU to provide parallel execution of application programs by initializing both processors when the system is initially program loaded (IPL). Parallelism in such systems is achieved by allowing either CPU to execute system services or application programs which are ready to run. The resources of both processors are thus expended for the duration of the IPL. In addition, it is difficult to devote the resources of a single processor to a particular system service or application. The system interface, as seen by the application, remains serial.

This routine allows the addition and deletion of additional processors to a uni- processor operating system, providing for system flexibility by performing CPU initialization and duplex mode supervisor activation. The CPU Initialization Routine (CIR) runs in an application region or partition, and is given control in or authority to obtain the supervisor state. It may be invoked any time after the host system is IPL'ed to dynamically control the number of processors in the operating environment. The CIR works in conjunction with a Duplex Mode Supervisor (DMSUP) which...