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Synchronized Multivibrator Oscillator

IP.com Disclosure Number: IPCOM000089565D
Original Publication Date: 1977-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 62K

Publishing Venue

IBM

Related People

Kahwaty, VN: AUTHOR

Abstract

It is frequently required to synchronize a higher frequency clock with a lower frequency source. The high frequency clock may be a monostable multivibrator oscillator which is advantageous due to the ease of creating odd frequencies, the oscillator being formed by monostable multivibrators 1 and 2. It is a free-running oscillator whose frequency is given by the following equation: freq. ~/= 1/R(1)C(1)Ln2 + R(2)C(2)Ln2 Oscillation is initiated by a negative-going edge on the A(1) input of 1. This causes a negative pulse on the output Q(1) of 1, whose time duration is given by R(1)C(1)Ln2. When this time has expired, a positive-going edge will occur on B(1). This will cause a negative pulse on Q(1), and oscillation in this fashion will continue. The waveforms describing this operation are shown in Fig. 2.

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Synchronized Multivibrator Oscillator

It is frequently required to synchronize a higher frequency clock with a lower frequency source. The high frequency clock may be a monostable multivibrator oscillator which is advantageous due to the ease of creating odd frequencies, the oscillator being formed by monostable multivibrators 1 and 2. It is a free-running oscillator whose frequency is given by the following equation: freq. ~/= 1/R(1)C(1)Ln2 + R(2)C(2)Ln2 Oscillation is initiated by a negative-going edge on the A(1) input of 1. This causes a negative pulse on the output Q(1) of 1, whose time duration is given by R(1)C(1)Ln2. When this time has expired, a positive- going edge will occur on B(1). This will cause a negative pulse on Q(1), and oscillation in this fashion will continue. The waveforms describing this operation are shown in Fig. 2. This oscillator by itself is well known.

The addition of a D-type latch 3 and a NAND circuit 6 along with a series of inverters C and 5 for circuit delay forms a synchronizable oscillator. It is assumed that the input frequency is significantly lower than the desired output frequency (by at least a factor of 2).

Operation is as follows assuming the monostable multivibrator oscillator is oscillating due to a previous input. When a positive-going edge of the input frequency appears on the CL input of latch 3, the output Q will go negative. Since both clear inputs of 1 and 2 are connected to this point, both Q(1) and Q(2) will g...