Browse Prior Art Database

Channel DAT Synchronization

IP.com Disclosure Number: IPCOM000089567D
Original Publication Date: 1977-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Moore, BB: AUTHOR

Abstract

U.S. Patent 3,839,706 describes a DAT (dynamic address translation) mechanism, for relocation of channel programs, which permits input/output (I/O) channel systems to operate in a paged or virtual memory environment in interlocked association with a central processing (host) system. An I/O memory bit in the storage protect key is manipulated by the channel to provide page interlocking of real storage frames relative to the host system. When a memory location in such a frame is accessed in behalf of any subchannel, the summary bit is set to lock out the host and a "fix" count in an I/O bit array associated with that frame is incremented. When the access is concluded, the fix count is decremented. When the fix count is decremented to zero, the summary bit is reset to allow host access to that frame.

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Channel DAT Synchronization

U.S. Patent 3,839,706 describes a DAT (dynamic address translation) mechanism, for relocation of channel programs, which permits input/output (I/O) channel systems to operate in a paged or virtual memory environment in interlocked association with a central processing (host) system. An I/O memory bit in the storage protect key is manipulated by the channel to provide page interlocking of real storage frames relative to the host system. When a memory location in such a frame is accessed in behalf of any subchannel, the summary bit is set to lock out the host and a "fix" count in an I/O bit array associated with that frame is incremented. When the access is concluded, the fix count is decremented. When the fix count is decremented to zero, the summary bit is reset to allow host access to that frame.

A problem in respect to use of this technique in a multihost environment is that a channel may initiate command action relative to an apparently accessible real page frame (zero fix count) while that frame is being assigned to a host system. The channel access process and host assignment control process may operate in conflict through a time "window", represented by the available state of the summary bit and zero state of the fix count. Consequently, both processes may advance without interlocking, and thereby allow a channel and assigned host to engage in conflicting accesses to the same frame. This "window" may be "closed" by: a) requiring...