Browse Prior Art Database

Error Logging

IP.com Disclosure Number: IPCOM000089588D
Original Publication Date: 1977-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 4 page(s) / 99K

Publishing Venue

IBM

Related People

Crooks, TL: AUTHOR [+3]

Abstract

Apparatus is provided to enable the recording of central processing unit (CPU) status information at initial microprogram load (IMPL) time, rather than at the time the error occurred. Normally, when an error occurs in a computer system, logout of the information which may be able to identify the error cannot reliably take place with the next CPU instruction after the error occurred. This is because the cause of the error, some transient electrical disturbance, for example, usually lasts for a period of time much longer than the time it takes to execute a CPU instruction. Hence, it is highly probable that additional errors would occur during the execution of the logout routine. The occurrence of an intermittent error will bring the computer system to a stopped condition.

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Error Logging

Apparatus is provided to enable the recording of central processing unit (CPU) status information at initial microprogram load (IMPL) time, rather than at the time the error occurred. Normally, when an error occurs in a computer system, logout of the information which may be able to identify the error cannot reliably take place with the next CPU instruction after the error occurred. This is because the cause of the error, some transient electrical disturbance, for example, usually lasts for a period of time much longer than the time it takes to execute a CPU instruction. Hence, it is highly probable that additional errors would occur during the execution of the logout routine. The occurrence of an intermittent error will bring the computer system to a stopped condition. The computer system operator normally would attempt to restart the computer system by pressing the load key. Operation of the load key initiates an IMPL sequence. The state of the computer system is preserved by a logout routine, which is invoked by the stopped condition and the IMPL sequence. The apparatus for initiating the logout can be incorporated into a computer system, such as described in U. S. Patent 3,972,023.

When the load key LK (Fig. 1) is depressed, OR circuit 10 passes a New IMPL Cycle signal to the data input of trigger 15. Trigger 15 then becomes set by the Special System RST signal. The output of trigger 15 conditions AND circuit
20. AND circuit 20 receives a signal from OR circuit 25 when there is a block processor clock (BPC) signal and a T7 timing signal on line 26, a Clocked System RST signal on line 27 or a T0-T2 timing signal on line 28. The signal passed by AND circuit 20 generates a New LSR Address Bit 4 signal via OR circuit 30. This New LSR Address Bit 4 signal forces the selection of the address register for the machine check level in the local storage regist...