Browse Prior Art Database

Single Bit Manipulation

IP.com Disclosure Number: IPCOM000089649D
Original Publication Date: 1977-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 4 page(s) / 33K

Publishing Venue

IBM

Related People

Davis, MI: AUTHOR [+3]

Abstract

More efficient performance is realized in byte- or word-oriented computer systems when testing and/or altering a single bit in main storage. There are many instances in a computer program where an operand may be a single bit. These include: (1) Fields which are bit significant by their essential nature, in which any one bit is independent of the other bits in the field, e.g. Interrupt Level Status Word (ILSW) in an IBM 1130, Priority Interrupt (PI) data in an IBM System/7, IBM 1800, Processor Status Word (PSW) in an IBM System/36O and IBM System/370. (2) Switches or flags used as logical decision-making elements.

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Single Bit Manipulation

More efficient performance is realized in byte- or word-oriented computer systems when testing and/or altering a single bit in main storage. There are many instances in a computer program where an operand may be a single bit. These include: (1) Fields which are bit significant by their essential nature, in which any one bit is independent of the other bits in the field, e.g. Interrupt Level Status Word (ILSW) in an IBM 1130, Priority Interrupt (PI) data in an IBM System/7, IBM 1800, Processor Status Word (PSW) in an IBM System/36O and IBM System/370. (2) Switches or flags used as logical decision-making elements.

In these cases, it is necessary to test the value of a bit, and also to be able to modify its value. The modification may be dependent or independent of the previous value of the bit. It is usually not possible to deal with a single bit in the machine language of most computer systems. Thus, a number of machine language instructions must be used, reducing performance and using more storage. The use of multiple instructions is also alien to the natural thought process of the programmer, decreasing ease of use and adding more opportunity for errors.

It is also often required that the testing and manipulation functions be performed in an atomic unit of computer operations to permit reentrancy of coding. This is often termed the classical "test and set" problem. Without a machine language instruction of the type described herein, the only solution is to disable interrupts for the duration of the subroutine which performs the testing and manipulation. This further impacts the responsiveness of the system and further degrades performance and storage efficiency.

The instruction format and functions are as follows: Bit Positions Function
Bits 0 - 4 Operation Code for "test" group of instructions Bits 5 - 7 Specifies base register
Bits 8 - 9 Defines one of four test operations Bits 10 - 15 Bit displacement used in conjunction with the register specified by Bits 5 - 7 to form

effective address.

Test bit.

As shown in Fig. 1, the Bit Displacement (BIT DISP) is added to the byte address contained in the register specified by the R field to form an effective address. The Bit Displacement field is an unsigned 6-bit binary integer.

The zero and negative indicators are reset. The bit at the effective address is then tested. If the bit is a zero, the zero indicator is set. If the bit is a one, the negative indicator is set. All other indicators are unchanged.

Exceptions.

1

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Addressing - The effective address is outside the fitted storage size of the system. The instruction is suppressed. A program check interruption occurs, with Invalid Storage Address set in the program status word (PSW).

Protection - In the Problem State, the instruction is fetched from a partition not assigned to the current operation. The instruction is suppressed. A program check interruption occurs, with Protect Check set in the PSW....