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Browse Prior Art Database

Self Aligned Fine Line Process for Making Capacitor Memories

IP.com Disclosure Number: IPCOM000089670D
Original Publication Date: 1977-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Geipel, H: AUTHOR [+3]

Abstract

A self-aligned fine line process employs aluminum nitride as a blocking mask for forming ion implant isolation to provide cells of very high density in semiconductor memories of the type described in U. S. Patent 4,040,017.

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Self Aligned Fine Line Process for Making Capacitor Memories

A self-aligned fine line process employs aluminum nitride as a blocking mask for forming ion implant isolation to provide cells of very high density in semiconductor memories of the type described in U. S. Patent 4,040,017.

The process includes growing a silicon dioxide layer 10 over a P-type silicon substrate 12, as indicated in Fig. 1. A first layer of doped polysilicon is deposited over the oxide layer 10 and bit/sense lines 14, 16, 18 and 20 are formed from the polysilicon layer by employing any of a number of known fine line techniques. The bit/sense lines 14, 16, 18 and 20 are passivated by oxide layers 22, 24, 26 and 28. A layer of photoresist 30 is deposited over the oxide layers 22, 24, 26 and 28 as well as over the exposed surfaces of oxide layer 10, and word lines are defined in the photoresist layer 30 by openings 32 and 34, as indicated more clearly in Figs. 2 and 3. A second layer of low resistivity material 36, such as a metal silicide, e.g., molybdenum-silicon, tungsten-silicon or rhodium-silicon, is deposited over the photoresist layer 30 and the exposed surfaces of the oxide layers 22, 24, 26 and 28, followed by the deposition of a layer of aluminum nitride 38.

By employing well-known liftoff techniques utilizing, e.g., sulfuric/ nitric acid in a ratio of 9:1 at 80 Degrees C, the entire photoresist layer 30 is removed, leaving word lines 40 and 42 with aluminum nitride strips 44 and 46...