Browse Prior Art Database

Self Registered Technique for Avoiding Compensation From the Shallow Base Implant in the Emitter Region of a Bipolar Transistor

IP.com Disclosure Number: IPCOM000089828D
Original Publication Date: 1977-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Dumke, WP: AUTHOR

Abstract

A method is presented for avoiding the compensation in the emitter region of a bipolar transistor which usually results from a shallow base implant. This compensation reduces the effective band gap in the emitter and results in a lower DC current gain, particularly at low temperatures. Because the planar dimensions of a emitter may be of the order of the limit of registration and because the shallow implant should come up to the boundary of the emitter in order not to seriously increase the extrinsic base resistance, a self-registration technique will be required to match the area against the shallow base implant with the area of the emitter.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 100% of the total text.

Page 1 of 2

Self Registered Technique for Avoiding Compensation From the Shallow Base Implant in the Emitter Region of a Bipolar Transistor

A method is presented for avoiding the compensation in the emitter region of a bipolar transistor which usually results from a shallow base implant. This compensation reduces the effective band gap in the emitter and results in a lower DC current gain, particularly at low temperatures. Because the planar dimensions of a emitter may be of the order of the limit of registration and because the shallow implant should come up to the boundary of the emitter in order not to seriously increase the extrinsic base resistance, a self-registration technique will be required to match the area against the shallow base implant with the area of the emitter.

The technique is illustrated in Figs. 1-4. In Fig. 1, the window for the deep base implant has been opened in thermally grown SiO(2) and the region implanted with boron. In Fig. 2, Si(3)N(4) is sputtered or deposited and except in the emitter region, which is protected by photoresist, is removed by HPO(3). The shallow base implant is then made. In Fig. 3, the boron is driven in, and SiO(2) is grown over those areas not covered by Si(3)N(4).

In Fig. 4, the photoresist and Si(3)N(4) are removed by suitable solvents and HPO(3), respectively. The emitter is implanted and the rest of the device fabricated by conventional procedures.

1

Page 2 of 2

2

[This page contains 3 pictures or other non-text objects...