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DC Biased High Density Josephson NDRO Memory Cell

IP.com Disclosure Number: IPCOM000089834D
Original Publication Date: 1977-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 28K

Publishing Venue

IBM

Related People

Arnett, PC: AUTHOR [+4]

Abstract

This article relates to a DC biased memory cell which eliminates the need for a preset cycle and for diagonal control lines, with their decoder and special selection logic, while providing excellent operating margins and high density storage.

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DC Biased High Density Josephson NDRO Memory Cell

This article relates to a DC biased memory cell which eliminates the need for a preset cycle and for diagonal control lines, with their decoder and special selection logic, while providing excellent operating margins and high density storage.

An equivalent circuit for a DC biased memory cell 1 is shown in Fig. 1. It consists of a current loop 2, which contains a Josephson junction J1, connected serially in the y-line. The x-line acts as a control for junction J1 during write operations while the sense line, containing a junction J2 controlled by the circulating current in loop 2, is used during read. The x-line and the sense line can have a common decoding network.

To illustrate the operation of cell 1, the DC bias current I(B) is chosen equal in magnitude to the bipolar y-select current, I(y), and the inductances of the left- and right-hand sides of loop 2 are equal. (Optimum operation may dictate other choices.) a) Write. Initially, with I(B) flowing in all y-lines (arbitrarily designated the positive direction), all cells 1 are in the "zero" state, as defined later. To write a "one," a positive I(y) is introduced in the selected y-line providing I(y) < I(mo) through junction J1 of memory cell 1. The magnitude of I(x) is chosen such that junction J1 of the selected cell will switch to the voltage state, but unselected cells with junction current I(y)/2 will not switch. Terminating I(y) leaves a counterclockwise circulating cell current of I(y)/2 plus I(B) flowing through the left- hand side of loop 2 only. The "zero" state of the cell is reestablished by a negative 1(y), again producing a gate current magnitude of I(y) and providing a clockwise circulating current of I(y)/2. Again I(B) flows through the left-hand side of loop 2 only. b) Read Sense gate J2 can be placed on either side of storage loo...