Browse Prior Art Database

Picosecond Pulse Shaper

IP.com Disclosure Number: IPCOM000089863D
Original Publication Date: 1968-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Firois, PC: AUTHOR [+2]

Abstract

This pulse shaping circuit produces an output pulse with rise and fall times which are a function of the rise time of the step recovery diodes D1 and D2. Rise times of 200 picoseconds are realized. The width of the output pulse is equal to the width of the input pulse and varies from less than 1 nanosecond to pulse widths of very long duration.

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Picosecond Pulse Shaper

This pulse shaping circuit produces an output pulse with rise and fall times which are a function of the rise time of the step recovery diodes D1 and D2. Rise times of 200 picoseconds are realized. The width of the output pulse is equal to the width of the input pulse and varies from less than 1 nanosecond to pulse widths of very long duration.

Prior to t=O, transistor T1 is off. D2 is forward biased from voltage V1, while D1 and D3 are back biased. T2 is a constant current source. V7 is at a lower positive voltage than V5 and D4 is therefore forward biased. The positive level at the load is set by the current which flows through D4 and is variable by varying this current. The negative level at the load is set by voltage -V6. At time t=O, T1 is turned on lowering the potential at node B to -V2. The minority carriers are pulled out of D2 and D2 snaps off, forward biasing D1 and D4. The potential at node A reverse biases D4 and causes the current to be switched away from the load through D3 and T1 instead.

At time t=1, the lagging edge of the input signal turns T1 off. The minority carriers are pulled out of D1 causing it to snap off. D2 is forward biased, D3 is back biased, thus returning the circuit to the state prior to t=0.

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