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Fast Recovery Chopper Circuit

IP.com Disclosure Number: IPCOM000089869D
Original Publication Date: 1968-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Andersen, SR: AUTHOR

Abstract

By making all the logic blocks in a delay responsive to the input signal, this chopper can be turned off rapidly at the end of the pulse which it is operating upon. Initially, a negative input at point a produces a positive level at point b while the output at point c remains negative. When a pulse is applied and the input at point a goes positive, point c also becomes positive as a result of the application of positive signals to both inputs of And 10. At some later time, determined by the cumulative logic delays of And's 12 and Inverter 14, point b goes negative causing point c to also go negative, thus shortening the pulse to a length determined by the number of logic delays.

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Fast Recovery Chopper Circuit

By making all the logic blocks in a delay responsive to the input signal, this chopper can be turned off rapidly at the end of the pulse which it is operating upon. Initially, a negative input at point a produces a positive level at point b while the output at point c remains negative. When a pulse is applied and the input at point a goes positive, point c also becomes positive as a result of the application of positive signals to both inputs of And 10. At some later time, determined by the cumulative logic delays of And's 12 and Inverter 14, point b goes negative causing point c to also go negative, thus shortening the pulse to a length determined by the number of logic delays. When the pulse at point a ends, all logic blocks immediately switch to their initial state because of their connection back to point a, thus reducing the time required for the recovery of the chopper circuit after completion of its function.

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