Browse Prior Art Database

Fault Localizing System

IP.com Disclosure Number: IPCOM000089909D
Original Publication Date: 1968-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 43K

Publishing Venue

IBM

Related People

Ravoux, D: AUTHOR

Abstract

In the communication systems comprising a large number of lines, such as telephone systems, the lines are continuously scanned in order to determine their status changes. The scanning circuits of which the number can be the same as that of lines, are successively activated by individual control circuits. In order to assure a good reliability, it is necessary to check the operation of these control circuits often and, in case of a defect, to localize the faulty one. The purpose of this system is to handle this problem.

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Fault Localizing System

In the communication systems comprising a large number of lines, such as telephone systems, the lines are continuously scanned in order to determine their status changes. The scanning circuits of which the number can be the same as that of lines, are successively activated by individual control circuits. In order to assure a good reliability, it is necessary to check the operation of these control circuits often and, in case of a defect, to localize the faulty one. The purpose of this system is to handle this problem.

Communication lines L1...Ln are respectively scanned through scanning circuits S1...Sn which are fed by respective control circuits C1...Cn. Each control circuit includes a driver D1...Dn and an And G1...Gn. The first input of every And is connected to a common scan command line CL. The second input of each And is connected to a particular address line A1...An coming from an address decoder.

To each driver is associated an inhibitor I1...In which, when a driver remains in the on status longer than a predetermined time T defined by the timing, short- circuits this driver to the ground. This enables a driver, which is not turned off after its normal control signal has ceased, to be positively turned off.

The system includes also a fault detection line DL which delivers, each time a signal is present in any of the circuits S1...Sn, a pulse which is detected by fault detector FD. Each time a scanning circuit is addressed, i.e., address line is on, the corresponding address is associated with the FD indication, thus enabling a defective circuit to be identified if a fault is detected.

The normal scanning procedure comprises three steps for each line to be scanned. During the first, only the address input of the And is fed. During the second, only the CL input is fed. During the third, both inputs are fed. Thu...