Browse Prior Art Database

Hollerith to EBCDIC Parity Generator

IP.com Disclosure Number: IPCOM000089977D
Original Publication Date: 1968-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 23K

Publishing Venue

IBM

Related People

Garriss, DS: AUTHOR [+2]

Abstract

A 12-position card code is translated to an eight-bit code by a logic translator 10. The parity of the eight-hit code is determined by a parity generator 11. This senses the card code and logically determines the parity bit to be added to the eight bit output. The parity of the resulting code therefore checks the translate logic 10 as well as normal output-input logic.

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Hollerith to EBCDIC Parity Generator

A 12-position card code is translated to an eight-bit code by a logic translator
10. The parity of the eight-hit code is determined by a parity generator 11. This senses the card code and logically determines the parity bit to be added to the eight bit output. The parity of the resulting code therefore checks the translate logic 10 as well as normal output-input logic.

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