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Programmable Priority Circuit

IP.com Disclosure Number: IPCOM000090005D
Original Publication Date: 1969-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Moysey, JR: AUTHOR

Abstract

The circuit permits ease in changing the order of priorities among computer interrupts. It can, for example, be used in a time-sharing environment to allow terminals to have a higher priority than a selector channel. The circuit includes a Matrix Switch 1 which connects Interrupt Request lines 1...5 to the five inputs of a Priority Circuit. Matrix Switch 2 connects the five outputs of the Priority Circuit to Interrupt Signal lines 1...5. Matrix Switch 2 can be identical to Matrix Switch 1. Interrupt Signal lines 1...5 respectively connect to address entry points that access required interrupt handling routines by available micro-programming or hardware techniques. Whenever any particular Interrupt Request line is actuated, the correspondingly numbered Interrupt Signal line is actuated. They have the same interrupt level.

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Programmable Priority Circuit

The circuit permits ease in changing the order of priorities among computer interrupts. It can, for example, be used in a time-sharing environment to allow terminals to have a higher priority than a selector channel. The circuit includes a Matrix Switch 1 which connects Interrupt Request lines 1...5 to the five inputs of a Priority Circuit. Matrix Switch 2 connects the five outputs of the Priority Circuit to Interrupt Signal lines 1...5. Matrix Switch 2 can be identical to Matrix Switch 1. Interrupt Signal lines 1...5 respectively connect to address entry points that access required interrupt handling routines by available micro-programming or hardware techniques. Whenever any particular Interrupt Request line is actuated, the correspondingly numbered Interrupt Signal line is actuated. They have the same interrupt level. The circuit controls only the priority relationship among the five Interrupt Levels, when simultaneous interrupt requests occur.

Each control lines 1...25 connects to the correspondingly numbered control line for both Matrix Switch 1 and Matrix Switch 2. They respectively select among the twenty-five permuted priority relationships available between the input Request lines and the output Signal lines. The control inputs to Matrix Switch 1 are connected in a different order than the same control inputs to Matrix Switch
2. The table shows the relationship between each control line 1...25 and the priority and interrupt level it activates. Each horizontal row corres...