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Combined Dual Triple Ramp ADC

IP.com Disclosure Number: IPCOM000090010D
Original Publication Date: 1969-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Jones, JR: AUTHOR

Abstract

In this analog-to-digital converter ADC when the input signal level is greater than a threshold voltage Vt, the circuit operates as a triple integrating ramp ADC. However, when the input voltage level is equal to or less than the threshold voltage Vt, the circuit operates as a dual integrating ramp ADC. The unknown analog voltage at terminal 11 is coupled through switch 10 to integrator 12 to start a conversion cycle. Circuits 14 control switch 10 and to timing pulses to counter 16. When counter 16 reaches full scale, an output is produced on line 17 which energizes circuits 14 to end the integration of the unknown analog voltage.

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Combined Dual Triple Ramp ADC

In this analog-to-digital converter ADC when the input signal level is greater than a threshold voltage Vt, the circuit operates as a triple integrating ramp ADC. However, when the input voltage level is equal to or less than the threshold voltage Vt, the circuit operates as a dual integrating ramp ADC. The unknown analog voltage at terminal 11 is coupled through switch 10 to integrator 12 to start a conversion cycle. Circuits 14 control switch 10 and to timing pulses to counter 16. When counter 16 reaches full scale, an output is produced on line 17 which energizes circuits 14 to end the integration of the unknown analog voltage.

This operation produces the ramp voltage from T0 to T1 and leaves a voltage proportional to the unknown analog voltage stored in integrator 12. The signal on line 17 is also coupled to one input of And 20 which, when conditioned, produces an output to change the state of flip-flop 22. The latter is reset at the start of a conversion by a signal on line 19 to a state which is operable to select a reference voltage VR2 of opposite polarity to the unknown analog voltage. Two comparators 18 and 28 sense the output of integrator 12. If the magnitude of the integrator output equals or exceeds the threshold voltage Vt at the time counter 16 reaches capacity, And 20 is conditioned and the state of flip-flop 22 is changed. The output of flip-flop 22 is then coupled to actuate switch 24 to couple reference voltage VR...