Browse Prior Art Database

Addressable Superconductive Memory

IP.com Disclosure Number: IPCOM000090190D
Original Publication Date: 1969-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Gaston, C: AUTHOR

Abstract

This superconductive loop memory is capable of binary selection, thus eliminating the need for decoding addresses. A conventional superconductive memory element is read or written when the single path in parallel with its storage loop is rendered normally conductive by coincident currents crossing it. Before generating the coincident currents, the addresses must be decoded. The memory contains many storage elements such as are shown. Storage element 1 has alternative superconductive paths, comprising legs 3, 5, and 7, in parallel with the storage loop, comprising leg 9. Every alternative path must be blocked, i.e., rendered normally conductive, in order to establish or sense a current in the storage loop. Address selection lines are so arranged that storage element 1 has address 110001.

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Addressable Superconductive Memory

This superconductive loop memory is capable of binary selection, thus eliminating the need for decoding addresses. A conventional superconductive memory element is read or written when the single path in parallel with its storage loop is rendered normally conductive by coincident currents crossing it. Before generating the coincident currents, the addresses must be decoded. The memory contains many storage elements such as are shown. Storage element 1 has alternative superconductive paths, comprising legs 3, 5, and 7, in parallel with the storage loop, comprising leg 9. Every alternative path must be blocked,
i.e., rendered normally conductive, in order to establish or sense a current in the storage loop. Address selection lines are so arranged that storage element 1 has address 110001.

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