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String Segment Condition Code Indication for Model Depended Instructions

IP.com Disclosure Number: IPCOM000090221D
Original Publication Date: 1969-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 30K

Publishing Venue

IBM

Related People

Dirac, JF: AUTHOR

Abstract

In families of data processing systems, programs designed to run on all models within the family using model independent instructions for model dependent data are described in combination with a ring structure.

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String Segment Condition Code Indication for Model Depended Instructions

In families of data processing systems, programs designed to run on all models within the family using model independent instructions for model dependent data are described in combination with a ring structure.

The amount of status information required for recovery after an error in a small model within a compatible system family typically includes 256 bytes. A large model within the family typically requires several times 256 bytes. As future models appear even greater requirements on the amount of information needed for recovery is likely to exist. In order to specify a single instruction, Save Status, which is compatible to all models a problem exists in abiding by the rule that instructions must specify a fixed length of data for a single execution of the instruction. Selection of particular length for that single execution is not feasible because of the unknown nature of future systems.

The problem of model dependency is avoided by dividing status, or other model dependent information, into segments of equal length and allowing the number of those segments required for any model to be as high as necessary. For example, first segment A, intermediate segments, B1...Bn, and the last segment C are placed in storage. For each model, a ring structure consisting of stages TA...TN and TC are connected to be energized in sequence by a central timing source such as the system clock not shown. The segments A, B1...Bn, and are sequentially gated out by the stages TA...TC to the storage gates.

The output from decoder 6 is dependent upon condition code register CC Reg. The latter is set and reset in a co...