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Combining Bipolar and FET Devices on a Single Silicon Substrate

IP.com Disclosure Number: IPCOM000090242D
Original Publication Date: 1969-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Terman, LM: AUTHOR

Abstract

This is a technique for the fabricating of a bipolar and unipolar device on the same substrate.

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Combining Bipolar and FET Devices on a Single Silicon Substrate

This is a technique for the fabricating of a bipolar and unipolar device on the same substrate.

The semiconductor substrate of P-type conductivity contains buried subcollector region 2 of N/+/ conductivity type, epitaxial layer 3 of P-conductivity type, isolation diffusions 4 disposed in layer 3 and electrically connecting region 2 with the surface of layer 3, base region 5 defined by region 2 and diffusions 4, emitter 6 formed in base region 5, emitter, base and collector contacts 7, 8, and 9 respectively, N conductivity type diffusions 10 formed in layer 3 as source and drain for a field effect transistor, gate 11 spaced from the surface of layer 3 by insulation 12 such as SiO(2), N/+/ conductivity type diffusions 13 formed in substrate 1, and gate 14 spaced from the surface of substrate by insulation 15.

One of the field effect transistors and the bipolar transistor are formed to provide the unipolar-bipolar transistor combination.

In the formation of a bipolar device, region 2 is formed by diffusing an N-type conductivity dopant into the surface of substrate 1 via an aperture which is previously formed in a masking layer by photolithographic techniques. After stripping the masking layer, layer 3 of P-conductivity type semiconductor is epitaxially deposited. After forming a masking layer into which apertures are etched, N/+/ regions 4 are formed by diffusion. Regions 4 isolate the active device fr...