Browse Prior Art Database

Data Recording and Clocking

IP.com Disclosure Number: IPCOM000090263D
Original Publication Date: 1969-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Rotticci, HJ: AUTHOR

Abstract

This recording and clocking system is for the frequency encoding of data. In the binary system shown, two data frequencies are employed. Each bit is represented by a frequency burst of at least three cycles. The binary data frequencies 10 and 11 are chosen so that a whole number of cycles is recorded within a bit cell time on media 12. Frequency discriminators 13 and 14 detect bursts of the binary data frequencies. Another frequency discriminator 15 detects the subharmonic clock frequency of both binary frequencies and drives clocking circuitry 16 and 17. The clocking circuitry then drives data separation circuitry 18 to provide a decoded pulse train representing the binary data.

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Data Recording and Clocking

This recording and clocking system is for the frequency encoding of data. In the binary system shown, two data frequencies are employed. Each bit is represented by a frequency burst of at least three cycles. The binary data frequencies 10 and 11 are chosen so that a whole number of cycles is recorded within a bit cell time on media 12. Frequency discriminators 13 and 14 detect bursts of the binary data frequencies. Another frequency discriminator 15 detects the subharmonic clock frequency of both binary frequencies and drives clocking circuitry 16 and 17. The clocking circuitry then drives data separation circuitry 18 to provide a decoded pulse train representing the binary data.

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