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Parallel Adder Sum Generating Logic

IP.com Disclosure Number: IPCOM000090341D
Original Publication Date: 1969-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 30K

Publishing Venue

IBM

Related People

Homan, ME: AUTHOR

Abstract

In AIEE Conference Paper CP 60-1327 entitled "A Four-Megacycle, 24-Bit Checked Binary Adder", it is shown that the sum in a parallel adder is equal to S=C-Pi-H+Gi-H+Pi-Gi-H+C-Gi-H where C = carry into the group from all lower order groups, Pi = group internal Carry Propagate, i.e., propagates C to the bit in the group, H = half-sum for the bit in the group, and Gi = group Internal Carry Generate for the bit.

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Parallel Adder Sum Generating Logic

In AIEE Conference Paper CP 60-1327 entitled "A Four-Megacycle, 24-Bit Checked Binary Adder", it is shown that the sum in a parallel adder is equal to S=C-Pi-H+Gi-H+Pi-Gi-H+C-Gi-H where C = carry into the group from all lower order groups, Pi = group internal Carry Propagate, i.e., propagates C to the bit in the group, H = half-sum for the bit in the group, and Gi = group Internal Carry Generate for the bit.

This equation can be implemented in one level of current switch emitter- follower logic in a straightforward manner. However, such an implementation requires both polarities of C and Gi. To generate these polarities require the addition of a phase-splitting level or circuits such as those used for adding a zero's carry network, which approximately doubles the number of carry logic circuits.

However, the sum can be implemented in one level of logic with only one polarity for the C and Gi signals by simplifying the above equation as below. S = C-Gi-H+Pi-Gi-H+(C-Pi+Gi)H S = C-Gi-H+Pi-Gi-H+(C+Gi)(Pi+Gi)H S = C-Gi-H+Pi- Gi-H+C-Gi+Pi-Gi+H S = C-Gi-H+Pi-Gi-H+(C-Gi-Pi-H+Pi-Gi-H+H).

The implementation of the sum S, from the last equation using current switch emitter-follower circuitry, is indicated. Term A is implemented by negative And- Invert 1. Term B is implemented by negative And-Invert 2. Term C is implemented by negative And's 3, 4 and 5. The Or functions within term C are implemented by a collector dot-Or indicated generally...