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Multiemitter Avalanche Transistor Decoder

IP.com Disclosure Number: IPCOM000090363D
Original Publication Date: 1969-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Davidson, EE: AUTHOR

Abstract

Decoding can be performed by a multiemitter transistor 10 operating in its avalanche mode of operation. When any input A1...An of transistor 10 is down, transistor 10 operates at state 1 on the open base characteristic curve. However, when all of the inputs to the emitters are up, transistor 10 operates at state 2 on its operational curve. In state 1 the transistor looks like a low impedance voltage source. In state 2 it looks like a high impedance current source. This causes the output E for the decoder to vary considerably. With this arrangement, the output E can be switched from its high to low state in considerably less than a nanosecond, therefore allowing very rapid operating times for the decoder.

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Multiemitter Avalanche Transistor Decoder

Decoding can be performed by a multiemitter transistor 10 operating in its avalanche mode of operation. When any input A1...An of transistor 10 is down, transistor 10 operates at state 1 on the open base characteristic curve. However, when all of the inputs to the emitters are up, transistor 10 operates at state 2 on its operational curve. In state 1 the transistor looks like a low impedance voltage source. In state 2 it looks like a high impedance current source. This causes the output E for the decoder to vary considerably. With this arrangement, the output E can be switched from its high to low state in considerably less than a nanosecond, therefore allowing very rapid operating times for the decoder. The decoder can be used to directly drive an access line of a memory array with the decoder operating as a level shifter as well as performing its selection functions.

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