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Semiconductor Device Structure and Method of Making

IP.com Disclosure Number: IPCOM000090426D
Original Publication Date: 1969-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 67K

Publishing Venue

IBM

Related People

Asher, KG: AUTHOR [+2]

Abstract

In this device, a retarding field gradient in base is provided which allows reduction in the base width. This has the effect of increasing the high cut-off frequency.

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Semiconductor Device Structure and Method of Making

In this device, a retarding field gradient in base is provided which allows reduction in the base width. This has the effect of increasing the high cut-off frequency.

In the fabrication method, a subcollector diffusion is carried out on wafer 10 resulting in a subcollector region 12 as in A. Boron, or other suitable diffusants of diffusivity higher than the impurity of the subcollector, is then diffused through either the same window or a smaller window 14, as in B, resulting in region 16 which includes both N and P-type impurities. Region 16 remains N-type being only partially compensated by the P-type impurity. Epitaxial layer 18 is then grown over the surface of wafer 10. During the epitaxial growth and other heat cycles required for producing isolation diffusion regions 20, emitter region 22 and base contacts 24 causing outdiffusion of regions 12 and 16 as in C. Since the P- type impurity in region 16 outdiffuses faster than the subcollector impurity in region 12, a P-type base region 28 is produced.

The base profile thus formed has a substantial impurity content within a narrow region which results in higher frequency response, the same or higher punch-through voltage, the same or lower base resistance, as compared to a conventionally made transistor having a surface diffused base. For best results it is desirable to put maximum impurity content, allowable by the solid solubility limit or degradation of cry...