Browse Prior Art Database

Memory Cell

IP.com Disclosure Number: IPCOM000090476D
Original Publication Date: 1969-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Berger, H: AUTHOR [+2]

Abstract

A P diffusion region between two common collector NPN transistors is used for decoupling the latter two elements. The P region is used for suppressing the parasitic lateral PNP transistor effect. The additional P diffusion zone is connected to a negative potential P+ isolation diffusion.

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Memory Cell

A P diffusion region between two common collector NPN transistors is used for decoupling the latter two elements. The P region is used for suppressing the parasitic lateral PNP transistor effect. The additional P diffusion zone is connected to a negative potential P+ isolation diffusion.

Two pairs of cross-coupled inversely operated NPN transistors belonging to two adjacent memory cells within a common N epitaxial layer can be stabilized by a P strip. Upon addressing and powering the two transistors of cell I, a 10 to 100 times increased cell current in relation to cell II results. One of the two transistors, for example T1, is conductive, and its base emits carriers to the base of the off transistor of cell II forming the collector of a lateral PNP transistor. This current can cause cell II to be switched from one state to the other.

Floating P strip 5, disposed symmetrically between the four transistors and which is not connected to P+ isolation diffusion 6, initially collects the injected holes, being charged to a positive-voltage level. Subsequently, this layer constitutes an emitter of a lateral PNP transistor. This results in a uniform injection towards the two transistors of cell II so that the two base regions of T2 and T3 collect additional current, thus stabilizing the jeopardized adjacent cell.

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