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Browse Prior Art Database

Priority Determination and Address Generator

IP.com Disclosure Number: IPCOM000090494D
Original Publication Date: 1969-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 29K

Publishing Venue

IBM

Related People

Werner, RH: AUTHOR

Abstract

This logic can be used in a data processing system where it is necessary to interrupt a program sequence and transfer control to specified locations under various conditions. These conditions can occur independently. Simultaneous conditions must transfer control to the location specified by the condition of highest priority, A location is specified by generating an address plus a control line to force use of the address.

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Priority Determination and Address Generator

This logic can be used in a data processing system where it is necessary to interrupt a program sequence and transfer control to specified locations under various conditions. These conditions can occur independently. Simultaneous conditions must transfer control to the location specified by the condition of highest priority, A location is specified by generating an address plus a control line to force use of the address.

The address generation and priority determination are combined into a single logical function by affecting specified bits of the address in different ways for each of the conditions. A bit can be either Unaffected, Forced on, or Forced off by a condition. The lowest priority condition assumes a bit to be at the level it establishes for the absence of all other conditions. The next higher priority condition drives it back to the level it has at the lowest priority. The number of bits required to handle a set of conditions is equal to half the number of conditions.

Assume six conditions of ascending priority of A...F. Three bits are generated such that the highest level condition of those present establishes the three-bit address. In the table, a 0 signifies no effect on the bit, a 1 signifies that the bit is driven to the opposite level and a phi specifies that the bit is driven back to the same level as 0. The binary code produced is termed a walking code.

Conditions ABC have no effect on Bit 1 and DEF...