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Elimination of Line Current Interaction in Memory Core Tests

IP.com Disclosure Number: IPCOM000090600D
Original Publication Date: 1969-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Moerschell, GE: AUTHOR [+2]

Abstract

Ultrasensitive tests of microminiature magnetic storage cores can be effected by AC line current variations. For example, a sequence of timed sampling pulses, used to induce and test a specific sequence of magnetization states in each core, can vary beyond acceptable limits in tests of successive cores. By synchronizing the pulses of such a sequence individually with specific line current phases, such variations are effectively eliminated.

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Elimination of Line Current Interaction in Memory Core Tests

Ultrasensitive tests of microminiature magnetic storage cores can be effected by AC line current variations. For example, a sequence of timed sampling pulses, used to induce and test a specific sequence of magnetization states in each core, can vary beyond acceptable limits in tests of successive cores. By synchronizing the pulses of such a sequence individually with specific line current phases, such variations are effectively eliminated.

A circuit for synchronizing the pulses of each core test sequence with specific cyclic phases of the AC line is shown. Detector circuit 1 detects and provides pulses at the positive slope zero-crossover transition of the 60 cycle line current by comparing the line current to ground reference voltage 2 in core testing circuits 3. Trigger 4, when switched to set condition by each pulse output of detector 1, enables And 5 to transfer the relatively high-frequency clock pulses from source 6 to binary counter 7.

Decoder 8, connected to the n stages C...C' of counter 7 provides 2/n/ single line outputs S...,S' corresponding to the digital states of such counter. A number of selected outputs Sk of decoder 8 are transferred through Or 9 to partially enable And 10. When fully enabled by the set output of trigger 11, And 10 selects clock pulses coinciding with the full group of selected count states Sk and transfers these pulses for use as the core test sequence. Trigger 11 is...