Browse Prior Art Database

A Modify Adapter Control Word Instruction

IP.com Disclosure Number: IPCOM000090603D
Original Publication Date: 1969-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 1 page(s) / 12K

Publishing Venue

IBM

Related People

Mallar, EE: AUTHOR [+4]

Abstract

This general instruction sets the central processing unit CPU to move an Adapter Control Word ACW from core storage through a specific adapter for modification if necessary and back to core storage. This instruction gives the CPU's program considerable flexibility in performing I/O functions with different types of I/O equipment. The Modify Adapter Control Word MACW instructions are distributed throughout a CPU program. The distribution is influenced by the expected frequency of reference to the adapters present on the CPU channels. This enables an operating program to run without interruptions to the supervisory program for the servicing of I/O units. Instruction MACW is executed in three consecutive memory cycles.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 59% of the total text.

Page 1 of 1

A Modify Adapter Control Word Instruction

This general instruction sets the central processing unit CPU to move an Adapter Control Word ACW from core storage through a specific adapter for modification if necessary and back to core storage. This instruction gives the CPU's program considerable flexibility in performing I/O functions with different types of I/O equipment. The Modify Adapter Control Word MACW instructions are distributed throughout a CPU program. The distribution is influenced by the expected frequency of reference to the adapters present on the CPU channels. This enables an operating program to run without interruptions to the supervisory program for the servicing of I/O units. Instruction MACW is executed in three consecutive memory cycles. In the first cycle, the instruction itself is read out of storage and decoded to put the address part into the storage address register and to set gates to route the next word read from storage over the output bus to the adapter indicated in the MACW instruction.

In the second memory read-write cycle, the addressed ACW is read out to the adapter. The storage address register is not incremented in this cycle. This is because the ACW is to be restored from the adapter to the same storage location during the write portion of the third memory cycle. This allows the write portion of the second memory cycle and the read portion of the third memory cycle for the adapter to perform any required operations on the ACW....