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Browse Prior Art Database

Directional Coupler

IP.com Disclosure Number: IPCOM000090604D
Original Publication Date: 1969-May-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Blackwell, R: AUTHOR [+6]

Abstract

In drawing 1, CPU 10 is coupled to a number of storage units 11 through series of like directional couplers 12 terminated by terminating resistor 13. Each coupler 12 consists of a two-core coaxial cable 14 one core of which receives an input from CPU 10 and transmits the input to the next coupler. The induced signal in the other core is passed to the corresponding storage unit 11. The coupled output circuit of each coupler is terminated at ground by a resistor 15. A signal pulse on the input line of each coupler 12 induces a pulse on the output line in the opposite direction. The duration of the output pulse is twice the electrical length of the coupler circuit, typically 4ns. The physical length of the coupler circuit can be two feet.

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Directional Coupler

In drawing 1, CPU 10 is coupled to a number of storage units 11 through series of like directional couplers 12 terminated by terminating resistor 13. Each coupler 12 consists of a two-core coaxial cable 14 one core of which receives an input from CPU 10 and transmits the input to the next coupler. The induced signal in the other core is passed to the corresponding storage unit 11. The coupled output circuit of each coupler is terminated at ground by a resistor 15. A signal pulse on the input line of each coupler 12 induces a pulse on the output line in the opposite direction. The duration of the output pulse is twice the electrical length of the coupler circuit, typically 4ns. The physical length of the coupler circuit can be two feet.

Each cable 14 is bent, drawing 2, into a U-shape and and is terminated with pluggable pins. The signal-carrying pins alternate with grounded pins E connected to the outer cable 14. In order to maintain the alternating relation, an additional grounded pin is provided as shown. There are two arrangements of pins as shown. In the series of couplers, each succeeding coupler is of one pin arrangement while the next is of the other arrangement. A pattern of pluggable pins is thus achieved which, when passed through a terminal block, appear as at the left of drawing 2. In this pattern, the alternation of grounded pins E is preserved. The pattern is divided into three groups A, B, and C and a separate socket can be plug...