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Direct Probing in AC Testers

IP.com Disclosure Number: IPCOM000090731D
Original Publication Date: 1969-Jun-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Ghafghaichi, M: AUTHOR

Abstract

This circuit is for direct probing in AC testers and eliminates remote probing. In AC testers, remote probing techniques are adopted when it is not physically possible to probe at a pin to be tested. Therefore, the effective measurement made is the delay between the leading edge of a pulse at the generator and the same edge of the pulse at the output of the component. This measurement does not take into account the risetime degradation caused by the input capacitance of the component. This degradation is as high as 500 ps or more for an input pulse having a 4 ns rise time.

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Direct Probing in AC Testers

This circuit is for direct probing in AC testers and eliminates remote probing. In AC testers, remote probing techniques are adopted when it is not physically possible to probe at a pin to be tested. Therefore, the effective measurement made is the delay between the leading edge of a pulse at the generator and the same edge of the pulse at the output of the component. This measurement does not take into account the risetime degradation caused by the input capacitance of the component. This degradation is as high as 500 ps or more for an input pulse having a 4 ns rise time.

This circuit eliminates this error by measuring delay from the input pin to the output pin of a component, thus taking the rise-time degradation of the input pulse into consideration. Each pin in the test head has two lines attached thereto. In this way, any pin in the module can be readily adapted for testing either an input pin or an output pin. In the example shown, pin 1 is an input and pin 4 is its corresponding output pin. A change in the relay contact positions adapts the circuit for testing either an input or an output pin.

Fast rise-time generator 10 supplies an input pulse to input pin 1 through an impedance matching network. The input capacitance at pin 1 degrades the rise time of the input pulse and this degraded pulse is displayed on channel A of an oscilloscope. Output pin 4 of the component under test sends the output pulse to channel B of the same os...