Browse Prior Art Database

Memory Clock Pulse Generator

IP.com Disclosure Number: IPCOM000090845D
Original Publication Date: 1969-Jul-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Buckley, F: AUTHOR

Abstract

This circuit is for driving multiphase clock pulses from a common oscillator. The phase-shifted signals are applied to waveshaping circuits which operate out of the saturated region. The outputs from waveshaping circuits are logically combined to provide the desired clock pulses. Spacing between the respective trains is varied by changing the value of the resistance in one of the RC phase-shift circuits. As shown at 1, oscillator 1 provides a sinusoidal output current that becomes voltage t at the output. Since the input impedances of stages u and v are low, currents i and j are determined by the RC networks consisting of C1, R1 and C2, R2. However, the phase is the desired gap T between A and B. In drawing 2, when u and v are positive, W = +I and Y = -I, When u and v are negative, W = -I and Y = +I.

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Memory Clock Pulse Generator

This circuit is for driving multiphase clock pulses from a common oscillator. The phase-shifted signals are applied to waveshaping circuits which operate out of the saturated region. The outputs from waveshaping circuits are logically combined to provide the desired clock pulses. Spacing between the respective trains is varied by changing the value of the resistance in one of the RC phase- shift circuits. As shown at 1, oscillator 1 provides a sinusoidal output current that becomes voltage t at the output. Since the input impedances of stages u and v are low, currents i and j are determined by the RC networks consisting of C1, R1 and C2, R2. However, the phase is the desired gap T between A and B. In drawing 2, when u and v are positive, W = +I and Y = -I, When u and v are negative, W = -I and Y = +I. Stages A and B respond linearly only to positive current. If negative current is applied, it causes the output to go below ground. When v is positive, Y is +I, R is up, Z is zero and S is down.

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