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DC Restoration Technique for Duobinary Transmission Through Band Pass Channel

IP.com Disclosure Number: IPCOM000090917D
Original Publication Date: 1969-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Critchlow, DL: AUTHOR

Abstract

When using duobinary coding on a system which does not pass DC such as a magnetic tape recording system or a synchronous single sideband modulation system, the received signal shifts up or down for certain patterns. This is shown in drawing A for a 011011011 pattern. The dotted curve shows the correct signal. The solid line signal shows the shifted signal which results from the fact that the system does not pass DC. A DC restoration system shown in drawing B eliminates the undesired shift. A circuit arrangement which converts the data back into duobinary form by a delay and summing circuit is used. A receiver 1 consisting of positive and negative threshold detectors 2 and 3, respectively, which feed And's 4.

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DC Restoration Technique for Duobinary Transmission Through Band Pass Channel

When using duobinary coding on a system which does not pass DC such as a magnetic tape recording system or a synchronous single sideband modulation system, the received signal shifts up or down for certain patterns. This is shown in drawing A for a 011011011 pattern. The dotted curve shows the correct signal. The solid line signal shows the shifted signal which results from the fact that the system does not pass DC. A DC restoration system shown in drawing B eliminates the undesired shift. A circuit arrangement which converts the data back into duobinary form by a delay and summing circuit is used. A receiver 1 consisting of positive and negative threshold detectors 2 and 3, respectively, which feed And's 4. These pass clocked signals relating to the detected data to decode logic circuit 5 which then passes the data to an output terminal. To regenerate the duobinary signal, data is fed back to delay device 10 and to summing circuit 11 directly. The output of delay 10, which is equal to one bit time, is also fed to circuit 11. The regenerated duobinary is then fed back to the input through a large resistor 12 supplying the DC component to the input signal. The time constant of the RC combination provided by a coupling capacitor 13 and the resistor is long compared with one bit time. Drawing C shows the condition of the data as it is connected directly to the summing circuit, the conditio...