Browse Prior Art Database

Core Storage Unit Tester

IP.com Disclosure Number: IPCOM000090922D
Original Publication Date: 1969-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Chin, JL: AUTHOR

Abstract

This digital Shmoo unit automatically finds and indicates the upper and lower running points of XY voltages versus a particular Z voltage for error free operation of a three-dimensional core storage array. The composite of these points is utilized to determine an allowable variation of drive voltages and to locate the nominal operating voltages of the memory unit.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Core Storage Unit Tester

This digital Shmoo unit automatically finds and indicates the upper and lower running points of XY voltages versus a particular Z voltage for error free operation of a three-dimensional core storage array. The composite of these points is utilized to determine an allowable variation of drive voltages and to locate the nominal operating voltages of the memory unit.

The Shmoo diagram shows the general operating procedure of the tester. With VZ fixed at an initial value VZ1, VXY is stepped in increments upwardly from point A along the VZ1 ordinate until the Basic Memory Exerciser is able to run through the entire memory without an error. The apparatus stops at this occurrence, i.e., point 1, which is the lower boundary of the Shmoo curve, and then searches for the corresponding upper boundary point 2. This procedure is implemented with respect to a number of memory exercise programs at each point.

For initial starting voltages VXY1 and VZ1, counters 10 and 12 are reset. With the unit started at point A, exerciser 14 generates either an Error Signal or a Pass Completed signal. An Error signal steps counter 10 up one position and generates Reload and Restart signals restarting 14. A Pass Completed, i.e., one program without error, generates Step Program Counter, Reload and Restart signals. These steps are repeated for the receipt of each Error Signal or Pass Completed signal until all data programs run error-free. This establishes point 1 and an Inhibit Start signal is generated to stop exerciser 14. XY indicators 16 and DVM 18 indicate such poi...