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Nondestructive Read Ferrite Core Memory

IP.com Disclosure Number: IPCOM000090944D
Original Publication Date: 1969-Aug-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 52K

Publishing Venue

IBM

Related People

Gogos, B: AUTHOR [+3]

Abstract

This ferrite core memory is organized for a nondestructive readout operation. The information states and corresponding hysteresis loops are shown. The read cycle consists of read Ir and regenerate Ireg pulses applied to the word line. The interrogation of the information state of the cores is performed by integration of the output voltage over the read pulse duration by a sensitive integrating sense amplifier linked to the bit lines. The outputs of the integrating amplifier circuits, sampled after the read pulse cycle, provide high resolution indications of stored information. The regenerate pulse resets the cores storing a 1 information from state A'' to state A and thus prepares the cores for the next read operation. The read pulse does not change the state of cores storing 0 information.

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Nondestructive Read Ferrite Core Memory

This ferrite core memory is organized for a nondestructive readout operation. The information states and corresponding hysteresis loops are shown. The read cycle consists of read Ir and regenerate Ireg pulses applied to the word line. The interrogation of the information state of the cores is performed by integration of the output voltage over the read pulse duration by a sensitive integrating sense amplifier linked to the bit lines. The outputs of the integrating amplifier circuits, sampled after the read pulse cycle, provide high resolution indications of stored information. The regenerate pulse resets the cores storing a 1 information from state A'' to state A and thus prepares the cores for the next read operation. The read pulse does not change the state of cores storing 0 information.

A core storing a 0 produces positive and negative pulses of equal amplitude and duration, in response to the read pulse, yielding zero integration output. However, cores in the 1 state react unsymmetrically to the read pulse. This is due to irreversible flux switching and yields nonzero integration outputs easily distinguished from the net noise output produced when sensing 0 states. Signal- to-noise ratios on the order of 20t40 for core signal level outputs on the order of 150-200 mv-ns are realized.

Write operations consist of the sequence of a clear pulse Ic which establishes 0 states in all cores in the selected word line, followed b...