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Signal Generator for Latch Clock

IP.com Disclosure Number: IPCOM000090979D
Original Publication Date: 1969-Sep-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Anderson, GF: AUTHOR [+2]

Abstract

The signal generator produces two nonoverlapping signals for utilization by a latch clock. Bistable multivibrator 11 supplies output signals E and F to threshold level detectors 13 and 15. The output signals A and B of the level detectors are always nonoverlapping. This is because signals E and F are utilized to trigger the base electrodes of each transistor T1 and T2 of the multivibrator. Only two RC time constants, waveforms E and F, are utilized to determine the timing of signals A and B. Various forms of level detection devices can be utilized without disturbing the basic operation of the multivibrator. Additionally, output waveforms C and D of the multivibrator are not loaded down and can be utilized by additional logic.

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Signal Generator for Latch Clock

The signal generator produces two nonoverlapping signals for utilization by a latch clock. Bistable multivibrator 11 supplies output signals E and F to threshold level detectors 13 and 15. The output signals A and B of the level detectors are always nonoverlapping. This is because signals E and F are utilized to trigger the base electrodes of each transistor T1 and T2 of the multivibrator. Only two RC time constants, waveforms E and F, are utilized to determine the timing of signals A and B. Various forms of level detection devices can be utilized without disturbing the basic operation of the multivibrator. Additionally, output waveforms C and D of the multivibrator are not loaded down and can be utilized by additional logic.

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