Browse Prior Art Database

Subroutine Calling Technique

IP.com Disclosure Number: IPCOM000091052D
Original Publication Date: 1969-Sep-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 41K

Publishing Venue

IBM

Related People

Bouricius, WG: AUTHOR [+2]

Abstract

The system has the capability of calling programmed subroutines from other programs or from microprograms. The system can also call microprogrammed subroutines from other microprograms or machine language programs. The system and technique have a number of uses, among which are diagnosis, implementation of higher level languages, instruction set optimization, and customer prescribed subroutines.

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Subroutine Calling Technique

The system has the capability of calling programmed subroutines from other programs or from microprograms. The system can also call microprogrammed subroutines from other microprograms or machine language programs. The system and technique have a number of uses, among which are diagnosis, implementation of higher level languages, instruction set optimization, and customer prescribed subroutines.

The drawing shows part of a micro-programmed computer arranged to implement the subject subroutine calling system. Micro-instructions are emitted by the microprogram store MPS into the microprogram data register MPDR. The location of a micro-instruction is determined by the contents of the microprogram address register MPAR. In normal operation, each micro-instruction specifies the address of the next by causing field A of MPDR to be transferred to MPAR. The next instruction address can be modified by selecting a particular machine condition via the condition selector CS under control of field B of MPDR.

Machine program instructions are retrieved from the instruction store IS under the control of the instruction stream counter ISC. As each instruction is fetched, ISC is incremented to the address of the next instruction. Machine instructions are interpreted by the microprogram. When a new instruction is fetched from IS, its operation code is loaded into the operator register OPR. The microprogram uses the operation code as a branch address to the appropriate microprogram routine to interpret that instruction. This is done by transferring the contents of OPR to MPAR at the approximate time, termed as a function branch.

When the machine program calls for a branch to a subroutine, it is necessary to store the contents of ISC so that the correct next instruction can be executed on return from the subroutine. This is done by taking the contents of ISC and loading it into the top of the subroutine call stack SRCS which is a push-down stack or a simulation of one. The address of the first instruction of the subroutine is then loaded into ISC from IS or some other machine register and the microprogram branches to the beginning of its normal instruction fetch routine. To return from the subroutine, SRCS is pushed up and the microprogram again branches to the beginning of its normal instruction fetch routine.

When the microprogram calls a microprogrammed subroutine, the same stack is used to store the return address but, in this case...