Browse Prior Art Database

Fixed Program Processor

IP.com Disclosure Number: IPCOM000091096D
Original Publication Date: 1969-Oct-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Houdek, ME: AUTHOR

Abstract

The processor accepts input data from an input device, circulates or accumulates new data based on the input data, and indicates the result by sending data to an output device. The program of the Processor is fixed. The data fields stored in the processor are fixed but are not necessarily of the same size. Register 10 buffers input data into storage 11. Output data comes from storage 11 through register 10 to the output device. BCD adder 12 adds two fields of stored data together by adding one decimal digit at a time. Register 13, register 14. and enter carry latch 15 provide inputs to adder 12 and to add one field of data in storage to another. One digit of the first field is loaded into register 10 and is then transferred to register 13.

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Fixed Program Processor

The processor accepts input data from an input device, circulates or accumulates new data based on the input data, and indicates the result by sending data to an output device. The program of the Processor is fixed. The data fields stored in the processor are fixed but are not necessarily of the same size. Register 10 buffers input data into storage 11. Output data comes from storage 11 through register 10 to the output device. BCD adder 12 adds two fields of stored data together by adding one decimal digit at a time. Register 13, register 14. and enter carry latch 15 provide inputs to adder 12 and to add one field of data in storage to another. One digit of the first field is loaded into register 10 and is then transferred to register 13. The corresponding digit of the second field is then loaded into register 10 and is transferred to register 14. The data in stored carry latch 16 is transferred to latch 15 and contents of registers 13 and 14 and latch 15 are added together. The sum is placed in register 10 where it is stored in place of the digit of the second field. Storage address register 17 is then advanced and the same operation is performed on the next corresponding digits.

Sequence register 18 defines the operation during a particular machine cycle and determines the transfers of data that take place. During each sequence, there is a plurality of timing pulses. Register 18 defines the transfer of data in accordance with these timi...