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Character Recognition Circuitry of Increased Resolution

IP.com Disclosure Number: IPCOM000091233D
Original Publication Date: 1969-Nov-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Neville, RG: AUTHOR

Abstract

Parallel reading systems have some difficulty in detecting and recognizing horizontal bars such as the horizontal sections 11, 12 or 13 of a character inscribed on a record medium. Such occurs when the medium is moved in the arrow direction with respect to read heads 17, constituted by any even number placed adjacent to each other and arranged to span the full width of all characters on the record. Heads 17 are shown in a position, with reference to the character which is being read, such that the horizontal bar portion 11 is centered between heads 17. Thus, a signal output of only reduced amplitude is obtained from each of these heads as shown at A1 and A2.

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Character Recognition Circuitry of Increased Resolution

Parallel reading systems have some difficulty in detecting and recognizing horizontal bars such as the horizontal sections 11, 12 or 13 of a character inscribed on a record medium. Such occurs when the medium is moved in the arrow direction with respect to read heads 17, constituted by any even number placed adjacent to each other and arranged to span the full width of all characters on the record. Heads 17 are shown in a position, with reference to the character which is being read, such that the horizontal bar portion 11 is centered between heads 17. Thus, a signal output of only reduced amplitude is obtained from each of these heads as shown at A1 and A2.

The outputs from the various read heads for channels 1, 2, and 3 are applied as input signals to amplifiers 28, 29, and 30. Each amplified output A1, A2, and A3 is fed to a full-wave rectifier 36, 37, and 38. One output of each rectifier is directed into a threshold and amplifier circuit 41, 42, and 43. One output conductor from each circuit 41, 42, and 43 is connected as one input to Or 47 or
48. The Or output is supplied to quantizer 49 or 50.

A second portion of the output of rectifiers 36, 37, and 38 is supplied, through conductors 51, 52, and 53 to analog summing circuits 54, 55, and 56, and, through conductors 58 and 60a, to analog summing circuits 54 and 55. The outputs of circuits 54, 55, and 56 are supplied to threshold and amplifier circuits 59 and 60, whose outputs feed as one input to And's 61 and 62. The outputs from circuits 41, 42, and 43 are also directed to And's 61 and 62 through inverter circuits 63, 64, and 65. Thu...