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Multiword Multidirectional Random Access Memory System

IP.com Disclosure Number: IPCOM000091242D
Original Publication Date: 1967-Dec-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Weinberger, A: AUTHOR

Abstract

Conventional memories have addresses that are defined by numbers. In many operations it is useful to step through a group of addresses in their numerical sequence. By contrast, in certain problems it is useful to consider the addresses as though they were laid out in a square matrix. In these problems, addresses can be taken up in sequential or simultaneous groups as they appear along a row or a column of the matrix. In such a memory, an address for a group of words can be made up of a starting address in conventional form and an indication of whether the group is arranged on a row or on a column. The article at page 1182 of the February, 1967 the IBM Technical Disclosure Bulletin describes how the addresses of an 8-by-8 array can be assigned to four conventional memories to achieve this kind of addressing.

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Multiword Multidirectional Random Access Memory System

Conventional memories have addresses that are defined by numbers. In many operations it is useful to step through a group of addresses in their numerical sequence. By contrast, in certain problems it is useful to consider the addresses as though they were laid out in a square matrix. In these problems, addresses can be taken up in sequential or simultaneous groups as they appear along a row or a column of the matrix. In such a memory, an address for a group of words can be made up of a starting address in conventional form and an indication of whether the group is arranged on a row or on a column. The article at page 1182 of the February, 1967 the IBM Technical Disclosure Bulletin describes how the addresses of an 8-by-8 array can be assigned to four conventional memories to achieve this kind of addressing.

Drawing 1 shows the addresses of a 512-word memory arranged as an 8-by- 8-by-8 cube that is partially separated to show addresses along the z dimension. Letters show the assignment of each address to one of four conventional memories in drawing 2. With this assignment of the addresses, four adjacent addresses in any dimension of the cube appear in the four separate memories. For example, adjacent addresses 0, 1, 2, and 3 appear respectively in memories A, B, C, and D. As drawing 1 partially shows, addresses 0, 64, 128, and 192 which are adjacent in the z dimension are also respectively located in memories ...