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Protecting the Surface of a Shallow Junction Semiconductor

IP.com Disclosure Number: IPCOM000091296D
Original Publication Date: 1968-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 21K

Publishing Venue

IBM

Related People

Barson, F: AUTHOR [+4]

Abstract

This method permits the formation of passivating or diffusion masking films on shallow junction devices without adverse effects to diffusion profiles and junction quality. Shallow junction semiconductor devices have relatively short diffusion times of the order of ten minutes. Thermal oxidation times for surface protection and masking purposes must be added to the diffusion times and increase the length of time at which the wafer is at high temperature beyond the allowable limit.

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Protecting the Surface of a Shallow Junction Semiconductor

This method permits the formation of passivating or diffusion masking films on shallow junction devices without adverse effects to diffusion profiles and junction quality. Shallow junction semiconductor devices have relatively short diffusion times of the order of ten minutes. Thermal oxidation times for surface protection and masking purposes must be added to the diffusion times and increase the length of time at which the wafer is at high temperature beyond the allowable limit.

Sputtered insulator films which are formed at a lower temperature than that required for thermal oxide film damage the device surface and degrade the performance. The use of a thin thermal oxide film followed by subsequent sputtered films permits shallow junction devices to be fabricated without adverse effect to the device surface or diffusion profile which degrade performance.

A thin layer of an insulating or passivating layer, typically by subsequent sputtered films permits shallow junction devices to be fabricated without adverse effect to the device surface or diffusion profile which degrade performance.

A thin layer of an insulating or passivating layer, typically silicon dioxide 10, is formed on crystal 12 by anodic oxidation or low temperature thermal oxidation processes. Then sputtered film 14 is deposited on layer 10 by conventional sputtering techniques. Openings are established in the combined film by conventional pho...