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Low Frequency Peak Detector

IP.com Disclosure Number: IPCOM000091298D
Original Publication Date: 1968-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Kruppa, RW: AUTHOR

Abstract

The peak detector detects the minimum or maximum point of a slowly varying signal having periods of the order of three minutes. The peak detector is shown in block diagram form in A and in detail in B. Input signal 1, drawing C, is fed to level detector 2, which holds the lowest level attainable by signal 1, and to inverter 3 with a gain equal to unity. The outputs of these circuits are shown in D. These outputs are then fed to adder circuit 4 which sums the inputs and multiplies the results by a large gain.

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Low Frequency Peak Detector

The peak detector detects the minimum or maximum point of a slowly varying signal having periods of the order of three minutes.

The peak detector is shown in block diagram form in A and in detail in B. Input signal 1, drawing C, is fed to level detector 2, which holds the lowest level attainable by signal 1, and to inverter 3 with a gain equal to unity. The outputs of these circuits are shown in D.

These outputs are then fed to adder circuit 4 which sums the inputs and multiplies the results by a large gain.

As signal 1 decreases negatively, the outputs of Invertor 3 and detector 2 are identical but opposite in polarity. Their sum equals zero and therefore the adder 4 output equals zero. At the minimum point, detector 2 holds the voltage while the Invertor 3 output continues to follow signal 1 and begins to decrease. Adder 3, as a result, sees a difference in voltage. Such flips its output to a saturated state, due to its large gain, indicating that the minimum is reached.

The accuracy of detection is dependent upon the magnitude of signal 1 and the gain of adder 3. With an input signal swing of 10 volts, a 1 millivolt change from the minimum can be detected, achieving a highly accurate sensing of the minimum.

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