Browse Prior Art Database

Multichip Bonding

IP.com Disclosure Number: IPCOM000091391D
Original Publication Date: 1968-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Schwab, MH: AUTHOR [+2]

Abstract

A method of bonding a plurality of chips simultaneously to a ceramic substrate is achieved by pressurizing a 3 mil flexible diaphragm, as of KAPTON*, positioned above the chip-loaded substrate while subjected to a high temperature. The resulting flexured diaphragm comes in contact with the chips assuring a uniform pressure distribution regardless of chip size, for thermal contact during the bonding operation. Pressure and temperature parameters are dependent on the particular metallurgy employed, for example, 400 degrees C for 2 min. @ 375 psig, in the case of gold-silicon. An inert atmosphere is purged through the substrate heater and holder to prevent oxidation of the gold-silicon during the bonding operation. Trademark of E.I. du Pont de Nemours and Co.

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Multichip Bonding

A method of bonding a plurality of chips simultaneously to a ceramic substrate is achieved by pressurizing a 3 mil flexible diaphragm, as of KAPTON*, positioned above the chip-loaded substrate while subjected to a high temperature. The resulting flexured diaphragm comes in contact with the chips assuring a uniform pressure distribution regardless of chip size, for thermal contact during the bonding operation. Pressure and temperature parameters are dependent on the particular metallurgy employed, for example, 400 degrees C for 2 min. @ 375 psig, in the case of gold-silicon. An inert atmosphere is purged through the substrate heater and holder to prevent oxidation of the gold-silicon during the bonding operation. Trademark of E.I. du Pont de Nemours and Co.

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