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Analog to Digital Converter

IP.com Disclosure Number: IPCOM000091415D
Original Publication Date: 1968-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Esteban, D: AUTHOR [+2]

Abstract

This analog-to-digital converter provides a digital output in the Gray code. Encoding is realized on a stage-by-stage basis. Each stage i, with i = 1, 2, 3, 4, 5 receiving an analog input from the previous stage, delivers a digital output and an analog output according to the function V(i+1) = 2 Absolute value of Vi-VREF. States 1, 2, 3 are identical to stage 4 which receives on input A, a voltage VA = V4/-/ - V4/+/ = - Absolute value of V4, and on input B, a voltage VB = V4/+/ - V4/-/ = + Absolute value of V4. Each stage includes two networks identical to network 1 made of an operational amplifier the feedback circuit of which includes two loops D1, R3 and D2, R4. The VA input signal is fed through R1, while a +VREF DC voltage is fed through R2.

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Analog to Digital Converter

This analog-to-digital converter provides a digital output in the Gray code. Encoding is realized on a stage-by-stage basis. Each stage i, with i = 1, 2, 3, 4, 5 receiving an analog input from the previous stage, delivers a digital output and an analog output according to the function V(i+1) = 2 Absolute value of Vi-VREF. States 1, 2, 3 are identical to stage 4 which receives on input A, a voltage VA = V4/-/ - V4/+/ = - Absolute value of V4, and on input B, a voltage VB = V4/+/ - V4/- / = + Absolute value of V4. Each stage includes two networks identical to network 1 made of an operational amplifier the feedback circuit of which includes two loops D1, R3 and D2, R4. The VA input signal is fed through R1, while a +VREF DC voltage is fed through R2.

By choosing R2=R3=R4=2R and R1=R, the circuit acts as a summing amplifier with gains of -2 and -1 for VA and back loops introduce a rectifying function, so that at point C for example VC = -V5/-/. In order to provide the complementary signal for obtaining the necessary input voltages to the next stage, a second network 2/ identical to network 1 is used with complementary signals + Absolute value V4 and -VREF on its inputs. Bit 4 due to zero crossover of the analog signal, is detected by using a high-speed differential comparator C1.

In order to obtain the desired analog transfer function, two operational amplifiers per coder stage are necessary, while one is sufficient for providing the desired digital function. In order to prevent distortion due to unbalanced reference...