Browse Prior Art Database

Computer Assisted Process for the Checking and Fabrication of Integrated Circuit Chip Masks

IP.com Disclosure Number: IPCOM000091435D
Original Publication Date: 1968-Jan-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 39K

Publishing Venue

IBM

Related People

Barone, AM: AUTHOR [+4]

Abstract

A computer-automated method for the design and fabrication of monolithic integrated circuit artwork is shown. The operator enters master slice data, keypunched schematic data and digitized data for the layout interconnection pattern. The computer then checks the interconnection pattern with the schematic diagram and indicates errors. The corrected interconnection pattern is processed by the computer so that the widths of the connecting lines are determined in accordance with design specifications. The computer then generates instructions for controlling an artwork generator. The latter makes an enlarged glass master interconnection pattern by directing a collimated beam of light onto a photosensitive plate.

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Computer Assisted Process for the Checking and Fabrication of Integrated Circuit Chip Masks

A computer-automated method for the design and fabrication of monolithic integrated circuit artwork is shown. The operator enters master slice data, keypunched schematic data and digitized data for the layout interconnection pattern. The computer then checks the interconnection pattern with the schematic diagram and indicates errors. The corrected interconnection pattern is processed by the computer so that the widths of the connecting lines are determined in accordance with design specifications. The computer then generates instructions for controlling an artwork generator. The latter makes an enlarged glass master interconnection pattern by directing a collimated beam of light onto a photosensitive plate.

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