Browse Prior Art Database

Proportional Limiting Device

IP.com Disclosure Number: IPCOM000091491D
Original Publication Date: 1968-Feb-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Desblache, A: AUTHOR

Abstract

The device is for gain control and clamping without a carrier. When no signal comes from line Li, the signal at the output of an Automatic Gain Control device is such that, through transistor T1, transistor T2 is off. The reference AC voltage arrives so at point M and, through diodes D3 and D4, there is produced at A and B, by the integrating effect of capacitors C1 and C2 respectively, two voltages +v and -v. Thus during input signal absence there are obtained two reference thresholds. When a signal Li is received, T2 is set on through T1. This results in a voltage repartition such that the reference AC voltage is isolated.

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Proportional Limiting Device

The device is for gain control and clamping without a carrier. When no signal comes from line Li, the signal at the output of an Automatic Gain Control device is such that, through transistor T1, transistor T2 is off. The reference AC voltage arrives so at point M and, through diodes D3 and D4, there is produced at A and B, by the integrating effect of capacitors C1 and C2 respectively, two voltages +v and -v. Thus during input signal absence there are obtained two reference thresholds. When a signal Li is received, T2 is set on through T1. This results in a voltage repartition such that the reference AC voltage is isolated. Inversely, the signal taken from point M is applied at point N through transistor T3, and, through D3 and D4, is integrated by capacitors C1 and C2 and produces at points A and B two voltages the +V and -V functions of the average absolute value reached by the input signal. These two voltages +/-V constitute the new value of the two reference thresholds. With these reference thresholds +/-v at rest, +/-V, during functioning, control the AGC device and further constitute, neglecting the voltage drop vO in diodes D1 and D2, the clamping thresholds for the received signal.

Waveforms Sh illustrates the mode of action of such thresholds.

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