Browse Prior Art Database

Quaternary Memory

IP.com Disclosure Number: IPCOM000091494D
Original Publication Date: 1968-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 38K

Publishing Venue

IBM

Related People

Sumilas, JW: AUTHOR [+2]

Abstract

In this ferrite core memory, each core has four storage states and represents a digit of quaternary information. Each core has two regions of differing coercive force. The coercive force of region 2 is about twice the coercive force of region 3. The current level for switching region 2 is twice the level for switching region 3. Word driver 4, word wire 5, bit driver 6, digit wire 7, and sense amplifier 8 show the arrangement of a matrix of these cores in a memory.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 54% of the total text.

Page 1 of 2

Quaternary Memory

In this ferrite core memory, each core has four storage states and represents a digit of quaternary information. Each core has two regions of differing coercive force. The coercive force of region 2 is about twice the coercive force of region
3. The current level for switching region 2 is twice the level for switching region
3. Word driver 4, word wire 5, bit driver 6, digit wire 7, and sense amplifier 8 show the arrangement of a matrix of these cores in a memory.

In the operation of the memory, each region of a core conventionally stores a binary digit. The four states of a core are the four combinations of the binary states of the two regions. The waveforms show a read operation. The word current is first raised to a level to switch region 3 to its 0 state. This level is one half the level to switch region 2. The amplitude of the signal which is produced on the wire 7 by the core signifies whether region 3 stored a 1 or a 0. The current is then raised further to a level to switch region 2 to its 0 state. The amplitude of the resulting signal on wire 7 is detected in amplifier 8. The two successive signals at the output of amplifier 8 can be handled as two binary bits or can be used in a quaternary form.

For a write operation, drivers 4 and 6 are energized with appropriate current levels to first set region 2 to the selected binary state and to then set region 3 to its selected binary state. The bit current is kept sufficiently below the coerci...