Browse Prior Art Database

Block Read Block Write Memory Cycle Organization

IP.com Disclosure Number: IPCOM000091499D
Original Publication Date: 1968-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 24K

Publishing Venue

IBM

Related People

Capasso, GF: AUTHOR [+2]

Abstract

This data processing system has a central processor unit CPU, a large memory, and a smaller, faster buffer memory. A control selection is provided for transferring blocks of data between the large memory and the buffer memory.

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Block Read Block Write Memory Cycle Organization

This data processing system has a central processor unit CPU, a large memory, and a smaller, faster buffer memory. A control selection is provided for transferring blocks of data between the large memory and the buffer memory.

A conventional memory cycle includes a read operation and a write operation. In a read operation, a word of data is transferred from the memory to a data register and is destroyed in the memory. In the following write operation, the data is either restored to the memory or new data is entered into the memory. The read-write cycle also includes time for the memory to get ready for each operation and time for the memory to recover from a preceding operation.

The system transfers blocks of data from the large memory to the buffer memory by a succession of read operations without intervening write operations. When the transfer is complete, the data is read from the buffer memory and written into the large memory to regenerate the data in the large memory. The total time for the block transfer is significantly smaller than an equivalent succession of conventional read-write operations. This is because the time for getting the system ready for a read operation or a write operation and the time for recovering from a preceding operation are required only at the beginning and end of the block operations.

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