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Mount for Semiconductor Device

IP.com Disclosure Number: IPCOM000091577D
Original Publication Date: 1968-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Frei, AH: AUTHOR [+2]

Abstract

For extreme high-speed operation it is essential that transistors, diodes or integrated circuits be connected in a well-matched fashion to their input-output lines. Parasitic inductivities are avoided as far as possible.

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Mount for Semiconductor Device

For extreme high-speed operation it is essential that transistors, diodes or integrated circuits be connected in a well-matched fashion to their input-output lines. Parasitic inductivities are avoided as far as possible.

Drawing 1A is a cross-section through a transistor mount on a ceramic microstrip plate. Conductive layers on top of the plate are signal lines connected by gold wires to the semiconductor chip. The latter is mounted on top of the cone-shaped metalized cavity in the microstrip plate. This arrangement provides minimum connection-line inductance. For impedance matching, the conductive lines on top of the microstrip plate are tapered off toward the semiconductor chip as in drawing 1B. This maintains the line impedance constant up to the semiconductor chip.

Drawing 2 shows an alternative arrangement using a straight perforation in ceramic microstrip plate. The conical metal stub, which is soldered to the ground layer, provides a ground connection to the semiconductor chip. The remaining cavity is filled with ceramic paste. The stub is recessed to compensate for the difference in dielectric constant between the ceramic of the microstrip plate and ceramic paste covering the insert. Gold wires connect the ends of the tapered lines to the contacts of the semiconductor chip. The completed arrangement is protected against damage and contamination.

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