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Sample and Hold Circuit

IP.com Disclosure Number: IPCOM000091591D
Original Publication Date: 1968-Mar-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Riso, V: AUTHOR

Abstract

The single operational amplifier OA is switched on each channel. A sample and hold circuit includes a switch, a holding capacitor, and a readout buffer into the feedback loop of an accurate operational amplifier. Portions of the circuit can be nonlinear. With DC offset, these defects are compensated for by operational amplifier OA. Interactions of power supply variations are also eliminated. RO and Ri, with i = 1...9, are conventional feedback resistors, the ratio of which determines the gain of the amplifier. During the sample time, the switches are in position 2. The feedback is looped and capacitor C is charged at the value of the output potential of OA. During the hold time, the switches are on position 1, point B1 is grounded, and the output of OA is disconnected from C.

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Sample and Hold Circuit

The single operational amplifier OA is switched on each channel. A sample and hold circuit includes a switch, a holding capacitor, and a readout buffer into the feedback loop of an accurate operational amplifier. Portions of the circuit can be nonlinear.

With DC offset, these defects are compensated for by operational amplifier OA. Interactions of power supply variations are also eliminated. RO and Ri, with i = 1...9, are conventional feedback resistors, the ratio of which determines the gain of the amplifier. During the sample time, the switches are in position 2. The feedback is looped and capacitor C is charged at the value of the output potential of OA. During the hold time, the switches are on position 1, point B1 is grounded, and the output of OA is disconnected from C. Readout buffer X applies the voltage of C at the output. Each channel is successively selected, when line Ci with i = 1...9 is energized, thus permitting to the input voltage to be sampled and held at a predetermined value.

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