Browse Prior Art Database

Flat Film Storage Control

IP.com Disclosure Number: IPCOM000091606D
Original Publication Date: 1968-Apr-01
Included in the Prior Art Database: 2005-Mar-05
Document File: 3 page(s) / 50K

Publishing Venue

IBM

Related People

Boland, LJ: AUTHOR [+4]

Abstract

Storage protection is used to allow reference to a main memory only when a protection key associated with the reference matches a storage key associated with the area of storage being referenced. In a processor having core storage and monolithic protection circuits, it is easy to provide protection. This is because the high-speed protection circuits are able to make the necessary key comparison and to nullify the storage reference before the memory cycle has had time to modify any information. But, in processors having a flat-film memory, the speed of the memory is close to the speed of the protection circuits. Thus, protection requires more sophistication than the degree of sophistication required for core memory.

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Flat Film Storage Control

Storage protection is used to allow reference to a main memory only when a protection key associated with the reference matches a storage key associated with the area of storage being referenced. In a processor having core storage and monolithic protection circuits, it is easy to provide protection. This is because the high-speed protection circuits are able to make the necessary key comparison and to nullify the storage reference before the memory cycle has had time to modify any information. But, in processors having a flat-film memory, the speed of the memory is close to the speed of the protection circuits. Thus, protection requires more sophistication than the degree of sophistication required for core memory. The drawing shows a system for providing storage protection for a main working storage MWS comprised of thin-film storage units.

MWS has a plurality of interleaved independent modules arranged to allow storage operation every machine cycle. The storage cycle is two machine cycles. Memory is addressed by addresses placed on storage address bus SAB. Data comes into MWS over storage bus in SBI from I/O Queue 2 and from storage data buffers SDB of central processing element CPE. Storage bus out SBO transmits data from MWS to various sinks in Queue 2 and CPE in accordance with a sink address placed in sink address register 3.

The system also includes storage control element SCE. This includes a pipeline of shift registers P1...P3 for transmitting successive I/O requests from Queue 2 to MWS. An I/O request enters P1 on one machine cycle. On the next machine cycle, it is transferred to P2 and on the next machine cycle it is transferred to P3, from where the MWS is selected.

In order to optimize accessibility, storage protect feature SPF is integrated into SCE and it protects MWS from unauthorized accesses during CPE and I/O store and fetch requests. It consists of monolithic storage devices and associated logic. For protection purposes, storage is divided into blocks and each block is associated with a storage key. A protection key is associated with each storage request and it must match the storage key for the block containing the requested address or else a protect violate interrupt is made and the store request is cancelled so that the violated address is left unchanged. A protect violate during a fetch request causes all 1's to be returned to the source.

For I/O requests, SPF is selected when the request is placed in P1 and, if the keys do not match, a violate signal is available on the next cycle. The violate signal is fed to request trace matrix 4.

The latter is in the nature of a synchronizing pipeline. This links the specific request with a violate signal for causing a store request to be cancelled when the MWS is accessed and which causes all data lines of SBO to be forced on so as to provide redundant data during a fetch request. During a storage request, the MWS address is placed on SAB an...